Memory Scarcity Drives Server Memory Tiering
As AI accelerators absorb memory supply, chip vendors and operators increasingly replace DRAM capacity with predicted tiering to flash and CXL memory, turning memory placement software into a competitive product.
weakening · confidence 38 · Emerging (watchlist) · tracking since November 13, 2026 · updated November 14, 2026
Score history
Daily conviction score, 0 to 100. Higher means the thesis is more strongly corroborated.
Now 38 · -2 since Nov 13 · ranged 38 to 40
Why the conviction moved
- Nov 13Strengthened +3
AMD says its licensed Mext software keeps up to 99% of server performance with half the DRAM by moving cold pages to NVMe, though that figure comes from one Spark workload on Azure (a chip-design test kept 80% of performance with 75% of memory on flash). A major chip vendor selling closed-source tiering software turns memory placement into a paid product.
Source trail
Supporting · November 13, 2026
AMD says its Mext software keeps up to 99% of server performance with half the DRAM by moving cold pages to NVMe
AMD says its licensed Mext software keeps up to 99% of server performance with half the DRAM by moving cold pages to NVMe, though that figure comes from one Spark workload on Azure (a chip-design test kept 80% of performance with 75% of memory on flash). A major chip vendor selling closed-source tiering software turns memory placement into a paid product.
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