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Morning Edition · Tuesday, July 21, 2026Published at 1:32 AM EDT · New York

Google Is Building a Chip That Bakes Gemini's Architecture Into Silicon

Engineers project the "Frozen v2" server part could serve six to ten times more tokens per watt than Google's newest tensor processing units, trading flexibility for efficiency.

Google Is Building a Chip That Bakes Gemini's Architecture Into Silicon

Google is developing a server accelerator, internally called Frozen v2, that would permanently implement parts of the Gemini model architecture in hardware rather than running it as software on a general-purpose chip, according to reporting from The Information relayed by CNBC and TechCrunch. The name describes the design, because the model's computing logic is fixed permanently into the silicon. Alphabet shares rose after the report.

The key technical distinction is that Frozen v2 hardwires the architecture, not the weights. New Gemini weights can still be loaded, as long as future models keep the same underlying structure. Google engineers estimate the part could serve between six and ten times more tokens per unit of power than the company's latest tensor processing units (TPUs), The Decoder reported. That efficiency comes at the cost of generality, because an application-specific integrated circuit (ASIC) tuned to one architecture becomes useless the moment the architecture changes.

Several caveats limit the claim. Google reportedly views Frozen v2 as a trial run rather than a TPU-scale program, with deployment expected around 2028. The projections are internal and unverified by independent benchmarks, and no silicon has been shown. What matters is the direction. A large cloud company is judging that model architectures are now stable enough to justify fixing them into hardware for the inference workloads that dominate its serving costs.

Veracity: Plausible
73/100
If true, who benefits

Alphabet, whose shares rose on the report as it signals lower inference cost and less dependence on Nvidia's general-purpose accelerators.

The nuance

The report itself is consistently relayed by many outlets, but the six-to-ten-times figure is an unbenchmarked internal projection on unbuilt silicon, sourced to a single original report and valid only if Gemini's architecture stays fixed to 2028.

An open-source-intelligence read of how likely this story is true with its real nuance, not a judgment of any outlet. It assesses the claim, weighing independent and adversarial reporting. How we label confidence.

What this means

The exposed party is the general-purpose accelerator model that underpins Nvidia's margins. If serving a fixed architecture on a bespoke ASIC really delivers six to ten times the tokens per watt, the marginal cost of running frontier inference falls sharply for whoever controls both the model and the chip, and Google controls both. The gain depends on Gemini's architecture staying stable through 2028, so Google is assuming that model design has become stable enough to treat as a fixed manufacturing specification rather than an active research question.

What to watch

  • Whether Google publishes or leaks independent tokens-per-watt figures for Frozen v2 against a named TPU baseline, which would separate a real efficiency step from an internal projection.
  • Whether other labs and clouds move toward model-specific silicon, signaling that architectures are converging enough to hardwire rather than still changing every cycle.

Observations to monitor, not financial advice.

4 sources

Synthesized from: CNBC · TechCrunch · The Decoder · Polylog editors

Part of a tracked trend

The Inference-Cost Efficiency Race

Techniques that cut tokens generated and KV-cache memory per query will keep compressing the marginal cost of serving reasoning models, making inference efficiency a recurring competitive axis alongside raw capability.